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Programming in AVR assembler language


Commands sorted by function

For the abbreviations used see the list of abbreviations.
0CLR r1Z N V1
255SER rh 1
ConstantLDI rh,c255 1
CopyRegister => RegisterMOV r1,r2 1
SRAM => Register, directLDS r1,c65535 2
SRAM => RegisterLD r1,rp 2
SRAM => Register and INCLD r1,rp+ 2
DEC, SRAM => RegisterLD r1,-rp 2
SRAM, displaced => RegisterLDD r1,ry+k63 2
Port => RegisterIN r1,p1 1
Stack => RegisterPOP r1 2
Program storage Z => R0LPM 3
Register => SRAM, directSTS c65535,r1 2
Register => SRAMST rp,r1 2
Register => SRAM and INCST rp+,r1 2
DEC, Register => SRAMST -rp,r1 2
Register => SRAM, displacedSTD ry+k63,r1 2
Register => PortOUT p1,r1 1
Register => StackPUSH r1 2
Add8 Bit, +1INC r1Z N V1
8 BitADD r1,r2Z C N V H1
8 Bit + CarryADC r1,r2Z C N V H1
16 Bit, constantADIW rd,k63Z C N V S2
Subtract8 Bit, -1DEC r1Z N V1
8 BitSUB r1,r2Z C N V H1
8 Bit, constantSUBI rh,c255Z C N V H1
8 Bit - CarrySBC r1,r2Z C N V H1
8 Bit - Carry, constantSBCI rh,c255Z C N V H1
16 BitSBIW rd,k63Z C N V S2
Shiftlogic, leftLSL r1Z C N V1
logic, rightLSR r1Z C N V1
Rotate, left over CarryROL r1Z C N V1
Rotate, right over CarryROR r1Z C N V1
Arithmetic, rightASR r1Z C N V1
Nibble exchangeSWAP r1 1
BinaryAndAND r1,r2Z N V1
And, constantANDI rh,c255Z N V1
OrOR r1,r2Z N V1
Or, constantORI rh,c255Z N V1
Exclusive-OrEOR r1,r2Z N V1
Ones-complementCOM r1Z C N V1
Twos-complementNEG r1Z C N V H1
Register, setSBR rh,c255Z N V1
Register, clearCBR rh,255Z N V1
Register, copy to T-FlagBST r1,b7T1
Register, copy from T-FlagBLD r1,b7 1
Port, setSBI pl,b7 2
Port, clearCBI pl,b7 2
Carry FlagSECC1
Negative FlagSENN1
Twos complement carry FlagSEVV1
Half carry FlagSEHH1
Signed FlagSESS1
Transfer FlagSETT1
Interrupt Enable FlagSEII1
Carry FlagCLCC1
Negative FlagCLNN1
Twos complement carry FlagCLVV1
Half carry FlagCLHH1
Signed FlagCLSS1
Transfer FlagCLTT1
Interrupt Enable FlagCLII1
CompareRegister, RegisterCP r1,r2Z C N V H1
Register, Register + CarryCPC r1,r2Z C N V H1
Register, constantCPI rh,c255Z C N V H1
Register, ≤0TST r1Z N V1
RelativeRJMP c4096 2
Indirect, Address in ZIJMP 2
Subroutine, relativeRCALL c4096 3
Subroutine, Address in ZICALL 3
Return from SubroutineRET 4
Return from InterruptRETII4
Statusbit setBRBS b7,c127 1/2
Statusbit clearBRBC b7,c127 1/2
Jump if equalBREQ c127 1/2
Jump if equalBRNE c127 1/2
Jump if carryBRCS c127 1/2
Jump if carry clearBRCC c127 1/2
Jump if equal or greaterBRSH c127 1/2
Jump if lowerBRLO c127 1/2
Jump if negativeBRMI c127 1/2
Jump if positiveBRPL c127 1/2
Jump if greater or equal (Signed)BRGE c127 1/2
Jump if lower than zero (Signed)BRLT c127 1/2
Jump on half carry setBRHS c127 1/2
Jump if half carry clearBRHC c127 1/2
Jump if T-Flag setBRTS c127 1/2
Jump if T-Flag clearBRTC c127 1/2
Jump if Twos complement carry setBRVS c127 1/2
Jump if Twos complement carry clearBRVC c127 1/2
Jump if Interrupts enabledBRIE c127 1/2
Jump if Interrupts disabledBRID c127 1/2
Registerbit=0SBRC r1,b7 1/2/3
Registerbit=1SBRS r1,b7 1/2/3
Portbit=0SBIC pl,b7 1/2/3
Portbit=1SBIS pl,b7 1/2/3
Compare, jump if equalCPSE r1,r2 1/2/3
OthersNo OperationNOP 1
SleepSLEEP 1
Watchdog ResetWDR 1

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Command list in alphabetic order

Assembler directives



ADC r1,r2
ADD r1,r2
ADIW rd,k63
AND r1,r2
ANDI rh,c255, Register
ASR r1
BLD r1,b7
BRCC c127
BRCS c127
BREQ c127
BRGE c127
BRHC c127
BRHS c127
BRID c127
BRIE c127
BRLO c127
BRLT c127
BRMI c127
BRNE c127
BRPL c127
BRSH c127
BRTC c127
BRTS c127
BRVC c127
BRVS c127
BST r1,b7
CBI pl,b7
CBR rh,255, Register
CLR r1
CLT, (command example)
COM r1
CP r1,r2
CPC r1,r2
CPI rh,c255, Register
CPSE r1,r2
DEC r1
EOR r1,r2
IJMP IN r1,p1
INC r1
LD rp,(rp,rp+,-rp) (Register), (SRAM access), Ports
LDD r1,ry+k63
LDI rh,c255 (Register), Pointer
LDS r1,c65535
LSL r1
LSR r1
MOV r1,r2
NEG r1
OR r1,r2 ORI rh,c255 OUT p1,r1
POP r1, (in Int-routine)
PUSH r1, (in Int-routine)
RCALL c4096
RET, (in Int-routine)
RJMP c4096
ROL r1
ROR r1
SBC r1,r2
SBCI rh,c255
SBI pl,b7
SBIC pl,b7
SBIS pl,b7
SBIW rd,k63
SBR rh,255, Register
SBRC r1,b7
SBRS r1,b7
SEI, (in Int-routine)
SER rh
SET, (example)
ST (rp/rp+/-rp),r1 (Register), SRAM access, Ports
STD ry+k63,r1
STS c65535,r1
SUB r1,r2
SUBI rh,c255
TST r1

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Ports, alphabetic order

ACSR, Analog Comparator Control and Status Register
DDRx, Port x Data Direction Register
EEAR, EEPROM Adress Register
EECR, EEPROM Control Register
EEDR, EEPROM Data Register
GIFR, General Interrupt Flag Register
GIMSK, General Interrupt Mask Register
ICR1L/H, Input Capture Register 1
MCUCR, MCU General Control Register
OCR1A, Output Compare Register 1 A
OCR1B, Output Compare Register 1 B
PINx, Port Input Access
PORTx, Port x Output Register
SPL/SPH, Stackpointer
SPCR, Serial Peripheral Control Register
SPDR, Serial Peripheral Data Register
SPSR, Serial Peripheral Status Register
SREG, Status Register
TCCR0, Timer/Counter Control Register, Timer 0
TCCR1A, Timer/Counter Control Register 1 A
TCCR1B, Timer/Counter Control Register 1 B
TCNT0, Timer/Counter Register, Counter 0
TCNT1, Timer/Counter Register, Counter 1
TIFR, Timer Interrupt Flag Register
TIMSK, Timer Interrupt Mask Register
UBRR, UART Baud Rate Register
UCR, UART Control Register
UDR, UART Data Register
WDTCR, Watchdog Timer Control Register

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List of abbreviations

The abbreviations used are chosen to include the value range. Register pairs are named by the lower of the two registers. Constants in jump commands are automatically calculated from the respective labels during assembly.
CategoryAbbrev.Means ...Value range
Registerr1Ordinary Source and Target registerR0..R31
r2Ordinary Source register
rhUpper page registerR16..R31
rdTwin registerR24(R25), R26(R27), R28(R29), R30(R31)
rpPointer registerX=R26(R27), Y=R28(R29), Z=R30(R31)
ryPointer register with displacementY=R28(R29), Z=R30(R31)
c127Conditioned jump distance-64..+63
c4096Relative jump distance-2048..+2047
Bitb7Bit position0..7
Portp1Ordinary Port0..63
plLower page port0..31

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