)
| Function | Subfunction | Command | Flags | Clk |
|---|---|---|---|---|
| Register set | 0 | CLR r1 | Z N V | 1 |
| 255 | SER rh | 1 | ||
| Constant | LDI rh,c255 | 1 | ||
| Copy | Register => Register | MOV r1,r2 | 1 | |
| SRAM => Register, direct | LDS r1,c65535 | 2 | ||
| SRAM => Register | LD r1,rp | 2 | ||
| SRAM => Register and INC | LD r1,rp+ | 2 | ||
| DEC, SRAM => Register | LD r1,-rp | 2 | ||
| SRAM, displaced => Register | LDD r1,ry+k63 | 2 | ||
| Port => Register | IN r1,p1 | 1 | ||
| Stack => Register | POP r1 | 2 | ||
| Program storage Z => R0 | LPM | 3 | ||
| Register => SRAM, direct | STS c65535,r1 | 2 | ||
| Register => SRAM | ST rp,r1 | 2 | ||
| Register => SRAM and INC | ST rp+,r1 | 2 | ||
| DEC, Register => SRAM | ST -rp,r1 | 2 | ||
| Register => SRAM, displaced | STD ry+k63,r1 | 2 | ||
| Register => Port | OUT p1,r1 | 1 | ||
| Register => Stack | PUSH r1 | 2 | ||
| Add | 8 Bit, +1 | INC r1 | Z N V | 1 |
| 8 Bit | ADD r1,r2 | Z C N V H | 1 | |
| 8 Bit + Carry | ADC r1,r2 | Z C N V H | 1 | |
| 16 Bit, constant | ADIW rd,k63 | Z C N V S | 2 | |
| Subtract | 8 Bit, -1 | DEC r1 | Z N V | 1 |
| 8 Bit | SUB r1,r2 | Z C N V H | 1 | |
| 8 Bit, constant | SUBI rh,c255 | Z C N V H | 1 | |
| 8 Bit - Carry | SBC r1,r2 | Z C N V H | 1 | |
| 8 Bit - Carry, constant | SBCI rh,c255 | Z C N V H | 1 | |
| 16 Bit | SBIW rd,k63 | Z C N V S | 2 | |
| Shift | logic, left | LSL r1 | Z C N V | 1 |
| logic, right | LSR r1 | Z C N V | 1 | |
| Rotate, left over Carry | ROL r1 | Z C N V | 1 | |
| Rotate, right over Carry | ROR r1 | Z C N V | 1 | |
| Arithmetic, right | ASR r1 | Z C N V | 1 | |
| Nibble exchange | SWAP r1 | 1 | ||
| Binary | And | AND r1,r2 | Z N V | 1 |
| And, constant | ANDI rh,c255 | Z N V | 1 | |
| Or | OR r1,r2 | Z N V | 1 | |
| Or, constant | ORI rh,c255 | Z N V | 1 | |
| Exclusive-Or | EOR r1,r2 | Z N V | 1 | |
| Ones-complement | COM r1 | Z C N V | 1 | |
| Twos-complement | NEG r1 | Z C N V H | 1 | |
| Bits change | Register, set | SBR rh,c255 | Z N V | 1 |
| Register, clear | CBR rh,255 | Z N V | 1 | |
| Register, copy to T-Flag | BST r1,b7 | T | 1 | |
| Register, copy from T-Flag | BLD r1,b7 | 1 | ||
| Port, set | SBI pl,b7 | 2 | ||
| Port, clear | CBI pl,b7 | 2 | ||
| Statusbit set | Zero-Flag | SEZ | Z | 1 |
| Carry Flag | SEC | C | 1 | |
| Negative Flag | SEN | N | 1 | |
| Twos complement carry Flag | SEV | V | 1 | |
| Half carry Flag | SEH | H | 1 | |
| Signed Flag | SES | S | 1 | |
| Transfer Flag | SET | T | 1 | |
| Interrupt Enable Flag | SEI | I | 1 | |
| Statusbit clear | Zero-Flag | CLZ | Z | 1 |
| Carry Flag | CLC | C | 1 | |
| Negative Flag | CLN | N | 1 | |
| Twos complement carry Flag | CLV | V | 1 | |
| Half carry Flag | CLH | H | 1 | |
| Signed Flag | CLS | S | 1 | |
| Transfer Flag | CLT | T | 1 | |
| Interrupt Enable Flag | CLI | I | 1 | |
| Compare | Register, Register | CP r1,r2 | Z C N V H | 1 |
| Register, Register + Carry | CPC r1,r2 | Z C N V H | 1 | |
| Register, constant | CPI rh,c255 | Z C N V H | 1 | |
| Register, ≤0 | TST r1 | Z N V | 1 | |
| Immediate Jump | Relative | RJMP c4096 | 2 | |
| Indirect, Address in Z | IJMP | 2 | ||
| Subroutine, relative | RCALL c4096 | 3 | ||
| Subroutine, Address in Z | ICALL | 3 | ||
| Return from Subroutine | RET | 4 | ||
| Return from Interrupt | RETI | I | 4 | |
| Conditioned Jump | Statusbit set | BRBS b7,c127 | 1/2 | |
| Statusbit clear | BRBC b7,c127 | 1/2 | ||
| Jump if equal | BREQ c127 | 1/2 | ||
| Jump if equal | BRNE c127 | 1/2 | ||
| Jump if carry | BRCS c127 | 1/2 | ||
| Jump if carry clear | BRCC c127 | 1/2 | ||
| Jump if equal or greater | BRSH c127 | 1/2 | ||
| Jump if lower | BRLO c127 | 1/2 | ||
| Jump if negative | BRMI c127 | 1/2 | ||
| Jump if positive | BRPL c127 | 1/2 | ||
| Jump if greater or equal (Signed) | BRGE c127 | 1/2 | ||
| Jump if lower than zero (Signed) | BRLT c127 | 1/2 | ||
| Jump on half carry set | BRHS c127 | 1/2 | ||
| Jump if half carry clear | BRHC c127 | 1/2 | ||
| Jump if T-Flag set | BRTS c127 | 1/2 | ||
| Jump if T-Flag clear | BRTC c127 | 1/2 | ||
| Jump if Twos complement carry set | BRVS c127 | 1/2 | ||
| Jump if Twos complement carry clear | BRVC c127 | 1/2 | ||
| Jump if Interrupts enabled | BRIE c127 | 1/2 | ||
| Jump if Interrupts disabled | BRID c127 | 1/2 | ||
| Conditioned Jumps | Registerbit=0 | SBRC r1,b7 | 1/2/3 | |
| Registerbit=1 | SBRS r1,b7 | 1/2/3 | ||
| Portbit=0 | SBIC pl,b7 | 1/2/3 | ||
| Portbit=1 | SBIS pl,b7 | 1/2/3 | ||
| Compare, jump if equal | CPSE r1,r2 | 1/2/3 | ||
| Others | No Operation | NOP | 1 | |
| Sleep | SLEEP | 1 | ||
| Watchdog Reset | WDR | 1 |
| Category | Abbrev. | Means ... | Value range |
|---|---|---|---|
| Register | r1 | Ordinary Source and Target register | R0..R31 |
| r2 | Ordinary Source register | ||
| rh | Upper page register | R16..R31 | |
| rd | Twin register | R24(R25), R26(R27), R28(R29), R30(R31) | |
| rp | Pointer register | X=R26(R27), Y=R28(R29), Z=R30(R31) | |
| ry | Pointer register with displacement | Y=R28(R29), Z=R30(R31) | |
| Constant | k63 | Pointer-constant | 0..63 |
| c127 | Conditioned jump distance | -64..+63 | |
| c255 | 8-Bit-Constant | 0..255 | |
| c4096 | Relative jump distance | -2048..+2047 | |
| c65535 | 16-Bit-Address | 0..65535 | |
| Bit | b7 | Bit position | 0..7 |
| Port | p1 | Ordinary Port | 0..63 |
| pl | Lower page port | 0..31 |