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Applications of
AVR Single Chip controllers AT90S, ATtiny, ATmega and ATxmega
LC-Oscillator for DCF77-Superhet-Receiver

4 DCF77-Superhet-Receiver with crystal filter

4.1 Oscillators for the DCF77-Superhet-Receiver

4.1.3 LC-VCO-Oszillator with ATtiny25 controller

The mixer frequency for the DCF77 superhet with a TCA440 has to work exactly at 77.5+32.768 = 110.268 kHz, with deviations of only a few Hz. To achieve this with an LC oscillator, its frequency has to be measured exactly and, in case it differs by more than +/-5 Hz, it has to be re-adjusted. This can be done with an ATtiny25.

4.1.3.1 Design of the LC-VCO-Oscillator

Firstly, building an LC oscillator is a simple task: an appropriate coil L and a convenient capacitor C has to be brought to oscillate. This requires one FET and generates a nice sine wave.

That is how such a simple LC oscillator looks like. It works as follows:

Depending from the capacitive voltage divider with the two capacitors from gate to source and from source to ground the FET produces a nice sine wave on the drain. On the source pin, the sine wave is rather distorted, and, if the divider ratio is changed a little bit, also the drain sine wave is rather distorted. The FET goes into saturation and distorts the clean sine wave. That comes from the large amplitude on the gate, which disturbs the function of the varactor diodes.

This has the disadvantage that the frequency regulation with the varactor diodes does not work good enough and is very far from predictable, even though those are reversed double diodes.

Conclusion: impracticable for a reliable operation.

Schematic of the LC-VCO

To achieve an orderly operation, the amplitude of the LC circuit has to be kept as low as possible. In this design, the amplitude is limited by two Germanium or Schottky diodes on the LC circuit, that limit the amplitude at +/-0.2 V. The FET does not amplify in this design, an additional inverting amplifier follows to feedback enough HF to allow oscillation for which the inversion is necessary.

4.1.3.2 Frequency measurement and -regulation

To measure the frequency and to regulate the voltage of the varactor diodes for a constant frequency of 110,268+/-5 Hz an ATtiny25 follows. The controller is clocked with an 8 MHz crystal oscillator, the internal RC oscillator is not exact enough for that task.

The timer/counter TC0 in the ATtiny25 generates the measuring time clock: the pulses are counted for exactly 0.5 seconds long. The 0.5 seconds are achieved by dividing the controller clock of 8 MHz

by 256 in the prescaler, and
by 125 in the counter in CTC mode, and
by 125 in a register.

As the analog comparer is used to detect pulses, each sine wave produces two analog comparer changes, so the 24-bit wide frequency counter registers directly hold the frequency in Hz.

If this is by more than 5 Hz smaller, the PWM value of the 8-bit counter TC1 in OCR1B is increased by one. That increases the PWM output voltage after the RC filter by 5V/256 = 19.5 mV. This increasing voltage decreases the capacity of the varactor diode by approximately 0.02 pF and increases the LC frequency accordingly.

If the measured frequency exceeds 110,268 Hz by more than 5 Hz, the OC1B value is decreased by one, the smaller voltage on the varactor diodes increases their capacity and lowers the frequency of the LC accordingly. By that the oscillator frequency is kept within that narrow bandwidth.

To signal adjustments made and the correctness of the frequency two LEDs (or one double LED red/green) are build in. The yellow LED signals that the frequency is too small, the red signals exceeding frequency. If the oscillator works correct, both LEDs are switched off. If you do not need that and your oscillator works correct, just remove the LED and its current-limiting resistor.

Scheme of the functional stages of the LC-VCO

Scheme of the functional stages of the LC-VCO

This is the overall schematic of the frequency regulated oscillator.

4.1.3.3 Programming the ATtiny25

The program for the ATtiny25 is written in Assembler. The source code can be downloaded as assembler source text here and can be viewed in the internet browser here.

The source code consists of the following functional parts:

Adjusting the hardware:
- initiating the stack for interrupt handling,
- initiating the LED output pin,
- starting the timer/counter TC1 as asynchroneous PWM (with 100µs wait time for PLL synchronization), with OC1B as poutput pin and with 255 in compare B (+5 V on the output,),
- starting the timer/counter 0 as gate timer for frequency measurement, with interrupt enable,
- starting the analog comparer for detecting edges on the input, with interrupt enable, and
- enabling the interrupt flag in the status register.
The two interrupt routines
- for frequency measurement via analog comparer: an 8-bit register counts the interrupts, on overflow an additional 16-bit counter is increased,
- for the gate time of the frequency measurement: a divider register, starting with 125, is decreased, it it reaches zero
  - the register divider is restartet with 125,
  - the current 24-bit counter state is copied to three other registers, and
  - the 24-bit counter registers are cleared.
The comparison with the lower and upper limit of the target frequency:
- Comparing the copied 24-bit counter with the smaller frequency limit: if the measured frequency is smaller the PWM frequency is increased (if not already at 255) and the yellow LED is switched on by setting its data direction bit and clearing the output bit,
- Comparing the copied 24-bit counter with the higher frequency limit: if the frequency is larger than that, the PWM value is decresed (if not already smaller than the lower limit) and the red LED is switched on by setting its direction- and port-bit,
- if both cases are not true, the LED is switched off by clearing its direction bit.

For both interrupt service routines their duration has been added in clock cycles.

The analog comparer interrupt occurs every 4.5 µs, so after 9 µs one interrupt event would be missing causing a difference of 1 Hz. That is the case if the TC0 interrupt is longer than 72 clock cycles.

An interrupt loss of the TC0 gate timer can only occur after 512 clock cycles.

Both interrupt service routines are fast enough to not interfere with each others.

The whole program has 137 words and fits very well into the flash memory of the ATtiny25.

Fuses of the ATtiny25

Do no forget, prior to or after programming the flash, to change the oscillator fuse of the ATtiny25, otherwise it would work with only 1 MHz.

4.1.3.4 Connecting the LC oscillator to the TCA440

The output of the LC oscillator on the collector of the BC547 is coupled to the TCA440's oscillator input on pin 4 via a capacitor of 1 nF. The differential input on pin 5 of the TCA440 is deactivated with a 1 or 10 nF capacitor to ground, therefore the oscillator input is unsymetrical and is made symmetrical only by the emitter resistor in the TCA440's oscillator input stage.

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